ASIC Physical Design Tools, Flows, Methodologies Manager
at Google
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 10 years of experience with the register-transfer level (RTL)-to-GDS process and industry-standard electronic design automation (EDA) tools, including Synopsys, Cadence, and Siemens suites. 6 years of experience in a people management role, managing a team of engineers within an application-specific integrated circuit (ASIC) design, semiconductor, or EDA environment. Learn more