Coherent NoC IP Design Engineer
at Google
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 8 years of experience with digital logic design principles, RTL design concepts, and languages, such as Verilog or SystemVerilog. Experience designing high-speed Network-on-Chip (NoC) or fabric IP, including mesh, ring, or torus topologies. Experience with Verilog and SystemVerilog for RTL design and synthesis. Experience delivering silicon IP blocks through multiple tape-outs. Learn more