CPU Design Verification Engineer

New Taipei, Banqiao District, New Taipei City, Taiwan·Mid·engineering
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Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 4 years of experience with verification methodologies and languages such as Universal Verification Methodology (UVM) and SystemVerilog. Experience developing and maintaining verification test benches, test cases, and test environments. Learn more

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