Senior CPU Design Verification Engineer, Emulation

Austin, TX, USA·Mid·engineering
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Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 8 years of experience in both Design Verification (UVM/SystemVerilog) and Hardware Emulation. Experience reproducing post-silicon lab failures in emulation or simulation environments. Experience with industry-standard debug tools (e.g., Synopsys Verdi, Cadence SimVision), with experience using scripting languages (Python, TCL, Bash) to automate debug workflows. Learn more

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