Static Timing Analysis Engineer, Full-Chip STA

Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience. 4 years of technical experience in silicon timing closure and chip integration. Experience in one or more static timing tools (e.g., PrimeTime, Tempus). Experience with Static Timing Analysis (STA) signoff constraint authoring for full-chip level, tapeout signoff requirements, checklists, and associated automation. Experience delivering silicon. Learn more