Static Timing Analysis Manager, Full Chip, SOC, Implementation
at Google
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 10 years of experience with silicon implementation and chip integration. Experience with STA sign-off constraint authoring for full-chip level, tapeout sign-off requirements, checklists, and associated automation. 3 years of experience in people management, developing employees. Experience delivering silicon. Learn more